MT8KTF51264HZ-1G9P1

MT8KTF51264HZ-1G9P1 is a DDR3 SDRAM module. It is a high-speed, CMOS dynamic random access memory module that uses internally configured 8-bank DDR3 SDRAM devices. A DDR3 SDRAM module uses DDR architecture to achieve high-speed operation. DDR3 architecture is essentially an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR3 SDRAM module effectively consists of a single 8n-bit-wide, one-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins. The DDR3 module uses two sets of differential signals: DQS, DQS# to capture data and CK and CK# to capture commands, addresses, and control signals. Differential clocks and data strobes ensure exceptional noise immunity for these signals and provide precise crossing points to capture input signals.

• Fast data transfer rates: PC3-14900, PC3-12800, or PC3-10600
• Backward compatible with standard 1.5V (±0.075V) DDR3 systems
• VDDSPD = 3.0–3.6V
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
• On-board I2C serial presence-detect (SPD) EEPROM
• 1.07ns at CL = 13 (DDR3-1866) frequency/CAS latency
• 4GB module density, 512 Meg x 64 configuration, 14.9GB/s module bandwidth
• 204-pin DIMM package
• Commercial operating temperature range from 0 to 70°C