8A34043E-000NBG

8A34043 four-channel universal frequency translator is a highly integrated timing device that generates synchronous or asynchronous clocks from its reference inputs. The device can be used in any synthesizer or jitter attenuator application, including optical transport network (OTN) and synchronous Ethernet (SyncE) systems. Typical applications include core and access IP switches / routers, synchronous Ethernet equipment, 10Gb, 40Gb, and 100Gb Ethernet interfaces, wireless infrastructure for 4.5G and 5G network equipment and OTN muxponders and line cards. Close-in phase noise complies with common public radio interface frequency synchronization requirements. Reference monitors qualify/disqualify references depending on LOS, activity, frequency monitoring, and/or LOS input pins.

• Supports all ITU-T G.709 frequencies, meets OTN jitter and wander requirements per ITU-T G.8251
• Four independent timing channels, four differential / eight LVCMOS outputs
• Two differential / four single-ended clock inputs
• Loss of signal (LOS) input pins (via GPIOs) can be assigned to any input clock reference
• System APLL operates from fundamental-mode crystal: 25MHz to 54MHz or from a crystal oscillator
• System DPLL accepts an XO, TCXO, or OCXO operating at virtually any frequency from 1MHz to 150MHz
• DPLLs can be configured as DCOs to synthesize clocks under the control of an external algorithm
• Supports 1MHz I2C or 50MHz SPI serial processor ports
• 1149.1 JTAG boundary scan, 7 × 7 mm 48-VFQFPN package
• Clock phase of each output is individually programmable in 1 to 2ns steps with total range of ±180°